Parallel port software registers technical summary

The following port description applies to Standard Parallel Port (SPP).

Offset Name Read/Write Bit No. Properties
Base + 0 Data Port Write Bit 7 Data 7
Bit 6 Data 6
Bit 5 Data 5
Bit 4 Data 4
Bit 3 Data 3
Bit 2 Data 2
Bit 1 Data 1
Bit 0 Data 0

This Data Register is simply used for outputting data on the Parallel Port’s data lines (Pins 2-9). If your port is bi-directional, you can receive data on this address.

Offset Name Read/Write Bit No. Properties
Base + 1 Status Port Read Only Bit 7 Busy
Bit 6 Ack
Bit 5 Paper Out
Bit 4 Select In
Bit 3 Error
Bit 2 IRQ (Not)
Bit 1 Reserved
Bit 0 Reserved

The Status Port (base address + 1) is a read only port. Any data written to this port will be ignored. Please note that Bit 7 (Busy) is a active low input.

Offset Name Read/Write Bit No. Properties
Base + 2 Control Port Read/Write Bit 7 Unused
Bit 6 Unused
Bit 5 Enable Bi-Directional Port
Bit 4 Enable IRQ Via Ack Line
Bit 3 Select Printer
Bit 2 Initialize Printer (Reset)
Bit 1 Auto Linefeed
Bit 0 Strobe

The Control Port (base address + 2) in intended as a write only port. When a printer is attached to the Parallel Port, four “controls” are used. These are Strobe, Auto Linefeed, Initialize and Select Printer, all of which are inverted except Initialize.

You can use the putput pins on this port also for input. The Control Port must be set to xxxx0100 to be able to read data, that is all pins to be +5v at the port so that you can pull it down to GND (logic 0) with your external hardware. A 4.7k resistor to +5V might be to pull the pin high when you are not pulling it low. The data is read form the same address you normally write data to.

<= in   DB25    Cent    Name of         Reg
=> out  pin     pin     Signal          Bit     Function Notes
------  ----    ----    --------        ---     -----------------------------
=>       1       1      -Strobe         C0-     Set Low pulse >0.5 us to send
=>       2       2      Data 0          D0      Set to least significant data
=>       3       3      Data 1          D1      ...
=>       4       4      Data 2          D2      ...
=>       5       5      Data 3          D3      ...
=>       6       6      Data 4          D4      ...
=>       7       7      Data 5          D5      ...
=>       8       8      Data 6          D6      ...
=>       9       9      Data 7          D7      Set to most significant data

<=      10      10      -Ack            S6+ IRQ Low Pulse ~ 5 uS, after accept
<=      11      11      +Busy           S7-     High for Busy/Offline/Error
<=      12      12      +PaperEnd       S5+     High for out of paper
<=      13      13      +SelectIn       S4+     High for printer selected
=>      14      14      -AutoFd         C1-     Set Low to autofeed one line
<=      15      32      -Error          S3+     Low for Error/Offline/PaperEnd
=>      16      31      -Init           C2+     Set Low pulse > 50uS to init
=>      17      36      -Select         C3-     Set Low to select printer
==      18-25   19-30,  Ground

Port           R/W  IOAddr  Bits   Function
----           ---  -----   ----   ---------------------
Data Out        W   Base+0  D0-D7  8 LS TTL outputs
Status In       R   Base+1  S3-S7  5 LS TTL inputs
Control Out     W   Base+2  C0-C3  4 TTL Open Collector outputs
    "           W   Base+2  C4     internal, IRQ enable
    "           W   Base+2  C5     internal, Tristate data [PS/2]

Data Feedback   R   Base+0  D0-D7  normally matches Data Out *
Control Feedbk  R   Base+2  C0-C3  normally matches Control Out *
    "           R   Base+2  C4     internal, IRQ enable readback

* NOTE: Can be different than written output state in certain cases where external circuit actively pulls the pin to different state parallel port tries to drive it. For example if output is written to be logic high, and the pin is shorted to ground (for example when pin is used as input), feedback reading tells the pin state to be low.

Note on paralle port bidirectional parallel port operation: Different manufacturers implement their bi-directional ports in different ways.

The parallel port operation when the computer boots up can vary somewhat between different computers. I don’t know that that the exact operation of paralel port durign boot-up would be standardized anywhere.

In simplest case the parallel port data pins state mght be random in the beginning, and quicly set to all at logic 0 state. That’s how things worked on old PCs usually. Some new PCs runnign modern Winodws versions seem to leave the parallel port pins all logic 1 (+3..5V). On some computers the pin states can change few times during the boot process, meaning if you have connected LEDs to parallel port pins you can see them flashing. For example many laptop computers like to send boot time diagnosing codes to the parallel port data pins. During the boot process the code sent to pralel port can change several times. Generally you can’t count on the state what the parallel port pins have until you write a defined state to them.

When controlling some electronics with PC parallel port the best idea is the following sequence:

  • 1. Make sure the devices you plan to control are not powered up (so it does not matterif PC data pins change state).
  • 2. Boot-up the PC normally
  • 3. Start your controlling software (this sets parallel port to right state)
  • 4. Power-up the device you plan to control

In this way the device will not get any control signal you did not design it to get, no matter what happens during power-up.

The first PC-compatible parallel printer ports were unidirectional, allowing 8-bit data transfer only from the host to the peripheral. These early Standard Printer Ports (SPP) implemented eight data lines and used nine handshaking lines, four output from the host and five input to the host. The SPP type implemented three registers for the control and monitoring of the data and handshaking lines; these are the data port, status port, and control port. The SPP type parallel ports are most commonly used for printers, plotters, keys, etc. Generally all modern parallel ports can operate in SPP mode. The maximum cable distance between computer and peripheral could only extend 6 feet.

Later came the PS/2 type bi-directional parallel port (BPP); this bi-directional port simply added the capability to read 8-bit data from the peripheral to the host. This parallel port type also implemented the same three registers as used by SPP for the control and monitoring of the data and handshaking lines; these are the data port, status port, and control port. In addition to norma operations there is one extra bit on control port that can set the data pins to output or input mode.

The IEEE 1284 standard, “Standard Signaling Method for a Bi-directional Parallel Peripheral Interface for Personal Computers”, sought to correct the major drawbacks to the original parallel port structure. IEEE 1284 sets standards for the cable, connector, and electrical interface, which guarantee interoperability between all parallel peripherals. The specified configuration ensures that data integrity is maintained, even at the highest data rates, and at a distance of up to 30 feet. Two new types of parallel ports with extended features are now available: the Enhanced Parallel Port (EPP) and the Extended Capabilities Port (ECP). EPP and ECP are standards defined by IEEE 1284 and Microsoft ECP Specifications. Both EPP and ECP ports may be operated in the SPP and bi-directional modes; however, operation in their feature modes requires both compatible peripherals and appropriate software drivers. Generally, EPP is used primarily by non-printer peripherals, CD ROM, tape drive, hard drive, network adapters, etc., while ECP is aimed at newer generation of printers and scanners. Currently, new products have been released having support for a mixture of these protocols. With EPP, the software driver may intermix read and write operations without any overhead or protocol handshaking. With the ECP protocol, changes in the data direction must be negotiated.

The I/O interface on EPP and ECP ports is somewhat different from normal I/O port controls. They can be viewed as supersets of SPP. An EPP parallel port implements two registers in addition to the standard data, status, and control ports. The outputs are tri-stateable outputs allow the EPP port to be used as a data bus for multiple EPP compatible devices. The entire data transfer occurs within one ISA I/O cycle. An ECP parallel port features two special modes, namely data and command cycles. In the Parallel Port Data FIFO Mode, data written or DMAed to a 16-byte FIFO is automatically transferred to a peripheral using standard parallel port protocol. The ECP Parallel Port Mode allows bi-directional data transfer using automatic interlocked handshaking via the ECP protocol. When the ECP protocol was proposed, a standard register implementation was also proposed through Microsoft ECP Specification. ECP protocol is meant to be driven by DMA rather than explicit I/O operations. ECP protocol is commonly seen on parallel port on motherboards and on high-end parallel port cards that plug to ISA bus, but often not on PCI bus parallel port cards (because PCI bus does not support ISA bus type DMA transfers).

Many modern parallel ports support SPPl, BPP, ECP and EPP modes, or at least most of them. On some systems and interface cards ther has been even options to select in which operation mode it work (so avoid any potential problems).

On the simple I/O controlling operations I have described in this document there are no benefits of any better than SPP operation modes. Usually the controllign of the parallel port shoudl work with simple I/O routines directly for most of the ports, no matter what operation modes they support. In some rare cases if you have problems, try setting the port to SPP mode, it should be guaranteed to work correctly with the I/O controlling examples I have given.

Programming I/O


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